Semiconductor & Technology Specialist, Ingenuity

William Keating

Dr. William Keating is a highly experienced senior executive with over 25 years experience in the IT/Semiconductor Industry. The majority of Dr. Keating's career was spent at Intel Corporation where he held senior leadership positions in Europe, the US and Asia from 1992 through 2014. He served as Intel's IT Director for APAC, China & Japan from 2005 through 2014 when he was based in Hong Kong and was responsible for the IT systems (Infrastructure, Networks, Data Centres, ERP, Sales & Marketing systems, Business Intelligence etc. ) for all of Intel's offices & factories through the region. From 1998 through 2005, he was the founder & director of an internal IT Consulting Organisation (IT Flex Services), a 500-person team which remains a core part of the Intel IT Organisation to this day. Dr. Keating's first 6 years at Intel were spent in charge of the Factory Automation Systems (Robotics, Databases, Networks, Servers, Clients etc.) supporting Intel's then state-of-the-art 200mm factory network. Since leaving Intel in 2014, Dr Keating established his own Technology Research & Consulting Company (www.ingenuity.hk) where he focuses on the products, roadmaps & technologies of companies such as Intel, AMD, Samsung, Apple, Micron- as well as the key equipment suppliers to those companies e.g. ASML, AMAT, Canon, Nikon etc. Dr. Keating specializes in niche topics of high significance within the semiconductor industry. These include the future of Moore's Law and in particular the significance of Lithography in maintaining Moore's Law (EUV, SDA, NanoImprint), the role & growth of the GPU in specialised applications such as Deep Learning (Neural Networks) for Voice, Image & Pattern recognition at companies such as Facebook, Google & Baidu. He also holds regular discussions on the future of memory, in particular the rise of 3D NAND and the emergence of new memory technologies such as 3D Xpoint.

Semiconductor & Technology Specialist

This Week in AI (Apr 5-11): Anthropic's Mythos Is Too Dangerous; Zhipu Tops Bench on Huawei Chips

This Week in AI (Mar 29 – Apr 4): OpenAI Pre-IPO $122bn Fundraising; Zhipu Results; Google Gemma 4

This Week in AI (Mar 22-28): Anthropic/Moonshot Eyeing IPOs; TurboQuant Rattles Memory Stocks

Ingenuity

Our focus is exclusively on in-depth research & consulting in the broader semiconductor industry. We focus on the key players, namely Intel, Micron, Qualcomm, Apple, Samsung, NVIDIA, AMD, TSMC & Global Foundries - as well as some of the lesser known, but nonetheless critical, companies such as ASML (for EUV), Mellanox, Cavium, Xilinx etc. We specialise in their products, roadmaps, process technologies, competitive advantages & threats etc. We also help our clients understand the implications of new and emerging technologies, e.g. 3D X-Point, 3D NAND, Carbon Nanotubes, Autonomous Driving, Graphene, Silicon Photonics, Wafer-Level Optics, Artificial Intelligence, FPGA, GPU, ASIC etc. 

Semiconductor Analysis & Research

Thematic (Sector/Industry)

Zimbabwe Semiconductors and semiconductor equipment / Thematic (Sector/Industry)

SMIC (Semiconductor Manufacturing International Corp) (688981 CH)

SMIC (Semiconductor Manufacturing International Corp)

<ul>
<li>Huawei introduced the “Tau Scaling Law” under which chip designers optimise for the time taken for elements of a chip to communicate, rather than for the space between transistors. </li>
<li>Huawei’s next-generation Kirin SoC, due autumn 2026, will be the first commercial chip to fully adopt the resulting architecture, which Huawei is calling “LogicFolding.”</li>
<li>Huawei chips designed under this framework will deliver transistor density equivalent to a 1.4nm process by 2031, three years after TSMC’s publicly stated 2028 timeline for its A14 (1.4nm) node.</li>
</ul>


Huawei introduced the “Tau Scaling Law” under which chip designers optimise for the time taken for elements of a chip to communicate, rather than for the space between transistors. 
Huawei’s next-generation Kirin SoC, due autumn 2026, will be the first commercial chip to fully adopt the resulting architecture, which Huawei is calling “LogicFolding.”
Huawei chips designed under this framework will deliver transistor density equivalent to a 1.4nm process by 2031, three years after TSMC’s publicly stated 2028 timeline for its A14 (1.4nm) node.


Huawei’s “Tau Scaling Law” and “LogicFolding”. Desperation, A Genuine Breakthrough Or Both?